Lecture 1 - Introduction Linear and Nonlinear Network
Lecture 2 - Small Signal Analysis of Nonlinear Networks
Lecture 3 - Small Signal Analysis
Lecture 4 - Incremental Model for Common Two Terminal Element Passive Two Terminal Elements
Lecture 5 - Linear and Nonlinear Two Ports and the Incremental Y Matrix
Lecture 6 - Graphical Representation of the Y Matrix
Lecture 7 - Nonlinear Two Ports With Incremental Gain
Lecture 8 - IV Charateristic of a Nonlinear 2 port with Incremental Gain
Lecture 9 - The MOSFET and its Characterisitics
Lecture 10 - Deriving the Common V Source Amplifier - Part 1
Lecture 11 - The Common Source Amplifier
Lecture 12 - Large Signal Behaviour of the Common Source Amplifier
Lecture 13 - The Common Source Amplifier Swing Limits
Lecture 14 - Introduction to Robust Biasing
Lecture 15 - Robust Biasing Part 1 Common Source Amplifier with DC Drain Feedback
Lecture 16 - Robust Biasing with the Current Mirror and Drain Gate Resistor
Lecture 17 - Robust Baising With Source Feedback - Part 1
Lecture 18 - Robust Biasing with Source Feedback - Part 2
Lecture 19 - Robust Biasing with Source Degeneration
Lecture 20 - Introduction to Negative Feedback
Lecture 21 - The Ideal Operational Amplifier
Lecture 22 - Negative Feedback (Continued...)
Lecture 23 - Robust Baising with Drain Measurement and Source Feedback
Lecture 24 - Robust biasing with source measurement and gate feedback
Lecture 25 - The Incremental Voltage Controlled Voltage Source The Common drain Amplifier Incremental Picture
Lecture 26 - Baising of the Common Drain Amplifier and Signal Swings
Lecture 27 - The VCVS Continued, the Incremental
Lecture 28 - Introducing the Current Controlled Voltage Source
Lecture 29 - The Incremental Current Controlled Voltage Source Transimpedance Amplifier
Lecture 30 - The Transimpedance amplifier (Continued...)
Lecture 31 - The Incremental current controlled current source, the common gate amplifier
Lecture 32 - Summary of controlled Sources and finite output Impedance of the Transistor
Lecture 33 - Effect of Finite Output Resistance on the Basic Building Blocks - Part 1
Lecture 34 - Effect of Finite Output Resistance on the Basic Building Blocks - Part 2
Lecture 35 - Effect of Finite Output Resistance on the Basic Building Blocks - Part 3
Lecture 36 - Finite output Effect in current Mirrors the Cascode Current Mirror
Lecture 37 - Comparison of Current Mirrors The High Swing Cascode
Lecture 38 - Precision High Swing Cascode
Lecture 39 - The PMOS transistor
Lecture 40 - Small Signal Model and Bias Stabilization
Lecture 41 - Basic Building Blocks with PMOS Devices
Lecture 42 - Fixed Transconductance Bias Circuits from First Principles
Lecture 43 - Limitation of a Resistive Load
Lecture 44 - The Active Load
Lecture 45 - The Active Load (Continued...)
Lecture 46 - The CMOS Inverter
Lecture 47 - The CMOS Inverter (Continued...)
Lecture 48 - The Differential Amplifier
Lecture 49 - Half - Circuit Analysis
Lecture 50 - The Different Amplifier with Active Load - Part 1
Lecture 51 - The Different Amplifier with Active Load - Part 2
Lecture 52 - Large Signal Behaviour of the Different Pair
Lecture 53 - The two Stage Opamp and Single Supply Operation
Lecture 54 - The two Stage Opamp (Continued...)
Lecture 55 - The Two Stage Opamp (Continued...)
Lecture 56 - Swing Limits of the Two Stage OTA
Lecture 57 - The Two-Stage Opamp
Lecture 58 - The Bandgap Reference Principle
Lecture 59 - The Bandgap Reference - Part 1
Lecture 60 - The Bandgap Reference - Part 2
Lecture 61 - Memory Effects in MOS Transistors
Lecture 62 - The Common Source Amplifier with Parasitic Capacitances
Lecture 63 - The Common Source Amplifier with Parasitic Capacitances
Lecture 64 - Frequency Response of the Common Drain Amplifier
Lecture 65 - Frequency Response of the Common Gate Amplifier
Lecture 66 - Stability of Negative Feedback System The First Order Forward Amplifier
Lecture 67 - Stabilty of Second Order Feedback System
Lecture 68 - Stability of Third Order Negative Feedback System
Lecture 69 - Dominant Pole Compensation - Part 1
Lecture 70 - Dominant Pole Cpmpensation - Part 2
Lecture 71 - Phase Margin
Lecture 72 - Example Phase Margin Caculations
Lecture 73 - Dominant Pole Compensation Summary
Lecture 74 - Phase Margin Example
Lecture 75 - The 2 Stage Miller Compensated Amplifier
Lecture 76 - 2 Stage Operational Amplifier and Miller Compensation (Continued...)
Lecture 77 - Intuition Behind the Dominant and Second Poles in a Miller Compensated OTA
Lecture 78 - 2 Stage Operational Amplifier and Miller Compensation Cancelling the RHP Zero
Lecture 79 - Miller Compensation OTA Schematic
Lecture 80 - Bipolar Junction Transistor Circuits-Device Equations and Small Signal Model
Lecture 81 - BJT Biasing and Basic Building Blocks
Lecture 82 - Bipolar Junction Transistor Circuits Swing Limits and Two Stage Opamp
Lecture 83 - Input Stage of the 741 Opamp
Lecture 84 - Basic Analysis of the 741
