Lecture 1 - Introduction: Objectives and Pre-requisites
Lecture 2 - Review of digital logic
Lecture 3 - Timing and Power in digital circuits
Lecture 4 - Implementation Costs and Metrics
Lecture 5 - Example: Audio processing
Lecture 6 - Example: AlexNet
Lecture 7 - Architecture cost components
Lecture 8 - Examples of Architectures
Lecture 9 - Multi-objective Optimization
Lecture 10 - Number representation
Lecture 11 - Scientific notation and Floating point
Lecture 12 - Basic FIR filter
Lecture 13 - Serial FIR filter architectures
Lecture 14 - Simple programmable architecture
Lecture 15 - Block diagrams and SFGs
Lecture 16 - Dataflow Graphs
Lecture 17 - Iteration period
Lecture 18 - FIR filter iteration period
Lecture 19 - IIR filter iteration period
Lecture 20 - Computation Model
Lecture 21 - Constraint analysis for IPB computation
Lecture 22 - Motivational examples for IPB
Lecture 23 - General IPB computation
Lecture 24 - Sample period calculation
Lecture 25 - Parallel architecture
Lecture 26 - Odd-even register reuse
Lecture 27 - Power consumption
Lecture 28 - Pipelining
Lecture 29 - Pipelining FIL Filter
Lecture 30 - Time-invariant Systems
Lecture 31 - Valid Pipelining Examples
Lecture 32 - Feedforward Cutsets
Lecture 33 - Balanced Pipeline
Lecture 34 - Retiming basic concept
Lecture 35 - Example and uses of retiming
Lecture 36 - Resource sharing: adder example
Lecture 37 - Changing iteration period
Lecture 38 - Hardware assumptions and constraint analysis
Lecture 39 - Mathematical formulation
Lecture 40 - Examples with formulation
Lecture 41 - Example: Biquad filter
Lecture 42 - Hardware architecture
Lecture 43 - Review biquad folding sets
Lecture 44 - Complete biquad hardware
Lecture 45 - DEMO: FFT in Vivado HLS
Lecture 46 - DEMO: FFT synthesis
Lecture 47 - Obtaining a folding schedule
Lecture 48 - ASAP schedule
Lecture 49 - Utilization Efficiency
Lecture 50 - ALAP schedule
Lecture 51 - Iteration period bound and scheduling
Lecture 52 - Retiming for scheduling
Lecture 53 - Blocked schedules
Lecture 54 - Overlapped schedules
Lecture 55 - Improved blocked schedule
Lecture 56 - Allocation, Binding and Scheduling
Lecture 57 - DEMO: Analyze FFT implementation
Lecture 58 - DEMO: FFT interface
Lecture 59 - Scheduling: problem formulation
Lecture 60 - Example: differential equation solver
Lecture 61 - Heuristic approaches to scheduling
Lecture 62 - Mathematical formulation
Lecture 63 - ILP formulation
Lecture 64 - List scheduling
Lecture 65 - Hardware model
Lecture 66 - Force Directed Scheduling
Lecture 67 - DEMO: HLS on FFT
Lecture 68 - DEMO: FFT Simulation and Optimization
Lecture 69 - DEMO: CPU interfacing
Lecture 70 - Software Compilation
Lecture 71 - Optimization Examples
Lecture 72 - Loop optimizations - 1
Lecture 73 - Loop optimizations - 2
Lecture 74 - Loop optimizations - 3
Lecture 75 - Software pipelining - 1
Lecture 76 - Software pipelining - 2
Lecture 77 - FFT Optimization
Lecture 78 - Background: CPUs and FPGAs
Lecture 79 - Demo: Vivado setup
Lecture 80 - Demo: Vivado HLS FFT IP Export
Lecture 81 - Demo: Vivado ILA and VIO on hardware
Lecture 82 - Demo: FFT on FPGA board
Lecture 83 - Demo: Simulating SoC and SDK
Lecture 84 - Background: Understanding ELF files
Lecture 85 - On-chip communication basics
Lecture 86 - Many-to-Many communication
Lecture 87 - AXI bus handshaking
Lecture 88 - AXI bus (Continued...)
Lecture 89 - Demo: Microblaze processor on FPGA
Lecture 90 - Demo: Performance counter AXI peripheral
Lecture 91 - Demo: HW accelerator for FPGA
Lecture 92 - DMA and arbitration
Lecture 93 - Network-on-chip basics
Lecture 94 - NoC - Topologies and metrics
Lecture 95 - NoC - Routing
Lecture 96 - NoC - Switching and flow control
Lecture 97 - Systolic Arrays - Background
Lecture 98 - Systolic Arrays - Examples
Lecture 99 - CORDIC algorithm
Lecture 100 - Parallel implementation of FIR filters
Lecture 101 - Unfolding Transformation
Lecture 102 - Lookahead Transformation
Lecture 103 - Introduction to GPUs and Matrix multiplication
