Lecture 1 - Why do we need parallel architecture ?
Lecture 2 - Multicore Revolution
Lecture 3 - What is Parallel Architecture?
Lecture 4 - Performance and Benchmarking
Lecture 5 - Reporting Results
Lecture 6 - Some Laws
Lecture 7 - A shift from sequential to parallel
Lecture 8 - Programming Models
Lecture 9 - Shared Memory Paradigm
Lecture 10 - Message Passing Paradigm
Lecture 11 - Examples
Lecture 12 - Cache Basics
Lecture 13 - Memory hierarchy questions - 1
Lecture 14 - Memory hierarchy questions - 2
Lecture 15 - Six basic cache optimisations - 1
Lecture 16 - Six basic cache optimisations - 2
Lecture 17 - Virtual Memory - 1
Lecture 18 - Virtual Memory - 2
Lecture 19 - Cache Coherence Problem
Lecture 20 - Concept of Serialisation
Lecture 21 - Coherence related Conditions
Lecture 22 - Types of Coherence Protocols - 1
Lecture 23 - Types of Coherence Protocols - 2
Lecture 24 - VI Protocol
Lecture 25 - 3 State: MSI Protocol
Lecture 26 - MESI Protocol
Lecture 27 - Dragon Protocol
Lecture 28 - Coherence misses
Lecture 29 - Coherence misses example
Lecture 30 - Correctness Requirements
Lecture 31 - Single-Level caches with an Atomic Bus - 1
Lecture 32 - Single-Level caches with an Atomic Bus - 2
Lecture 33 - Multi-Level caches with an Atomic Bus - 1
Lecture 34 - Multi-Level caches with an Atomic Bus - 2
Lecture 35 - Split transaction Bus
Lecture 36 - Phases in Split Transaction Bus
Lecture 37 - Request table and Organization
Lecture 38 - Path of a Cache Miss
Lecture 39 - Multi-Level cache + Split transaction Bus
Lecture 40 - Introduction to Directory Cache Coherence
Lecture 41 - Basic Operation of a Directory
Lecture 42 - Directory Organisations
Lecture 43 - Directory Overhead Optimisations
Lecture 44 - Directory Protocol optimisations
Lecture 45 - Proving Correctness - 1
Lecture 46 - Proving Correctness - 2
Lecture 47 - SGI Origin Architecture
Lecture 48 - Working of protocol
Lecture 49 - Correctness Issues
Lecture 50 - Sequent NUMA-Q Architecture
Lecture 51 - Working of protocol - 1
Lecture 52 - Working of protocol - 2
Lecture 53 - Correctness and Protocol Interaction
Lecture 54 - Sequential Consistency
Lecture 55 - Implications of Sequential Consistency
Lecture 56 - Relaxed Consistency Models - 1
Lecture 57 - Relaxed Consistency Models - 2
Lecture 58 - Relaxing all Orders
Lecture 59 - Uninterruptible Instructions
Lecture 60 - Implementation of atomic instructions
Lecture 61 - Other synchronisation options
Lecture 62 - Interconnect Overview
Lecture 63 - Topologies
Lecture 64 - Routing
Lecture 65 - Flow Control