Lecture 1 - Introduction and Overview of the Course
Lecture 2 - Instruction Execution Principles
Lecture 3 - Introduction to Instruction Pipeline
Lecture 4 - Introduction to Superscalar Pipelines
Lecture 5 - Instruction Pipeline and Performance - I
Lecture 6 - Instruction Pipeline and Performance - II
Lecture 7 - Introduction to Cache Memory
Lecture 8 - Block Replacement Techniques and Write Strategy
Lecture 9 - gem5 Simulator - An Overview
Lecture 10 - Cache Memory
Lecture 11 - Basic Cache Optimization Techniques
Lecture 12 - gem5 Simulator - Cache Optimisation
Lecture 13 - Advanced Cache Optimization Techniques - I
Lecture 14 - Advanced Cache Optimization Techniques - II
Lecture 15 - Cache Memory Optimizations
Lecture 16 - Introduction to DRAM System
Lecture 17 - DRAM Controllers and Address Mapping
Lecture 18 - Address Translation Mechanisms
Lecture 19 - Main Memory Concepts
Lecture 20 - Introduction to Tiled Chip Multicore Processors
Lecture 21 - Routing Techniques in Network On Chip
Lecture 22 - Network On Chip Router Micro-Architecture
Lecture 23 - gem5 Simulator - NoC Optimisation
Lecture 24 - Energy Efficient Bufferless NoC Routers
Lecture 25 - Sidebuffered Deflection Routers
Lecture 26 - Concepts in Network on Chip
Lecture 27 - QoS of NoC and Caches in TCMP Systems
Lecture 28 - Emerging Trends in Network On Chips
Lecture 29 - Concepts in TCMP Systems